From: Anup Patel Date: Wed, 16 Jul 2014 10:32:15 +0000 (+0530) Subject: xen/arm: Trap and yield on WFE instructions X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~4652 X-Git-Url: https://dgit.raspbian.org/%22http:/www.example.com/cgi/%22https:/%22bookmarks:/%22man:///%22http:/www.example.com/cgi/%22https:/%22bookmarks:/%22man:/?a=commitdiff_plain;h=af82c49116c7bf6857be6bf6b56094b9eb2ef012;p=xen.git xen/arm: Trap and yield on WFE instructions If we have a Guest/DomU with two or more of its VCPUs running on same host CPU then it can quite likely happen that these VCPUs fight for same spinlock and one of them will waste CPU cycles in WFE instruction. This patch makes WFE instruction trap for VCPU and forces VCPU to yield its timeslice. The KVM ARM/ARM64 also does similar thing for handling WFE instructions. (Please refer, https://lists.cs.columbia.edu/pipermail/kvmarm/2013-November/006259.html) In general, this patch is more of an optimization for an oversubscribed system having number of VCPUs more than underlying host CPUs. Signed-off-by: Anup Patel Signed-off-by: Pranavkumar Sawargaonkar Tested-by: Pranavkumar Sawargaonkar Acked-by: Ian Campbell [ ijc -- resolved conflict with "Adding helper function for WFI", nuked stray hard tab ] --- diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 5e4c837ca4..3dfabd066f 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -90,7 +90,7 @@ void __cpuinit init_traps(void) /* Setup hypervisor traps */ WRITE_SYSREG(HCR_PTW|HCR_BSU_INNER|HCR_AMO|HCR_IMO|HCR_FMO|HCR_VM| - HCR_TWI|HCR_TSC|HCR_TAC|HCR_SWIO|HCR_TIDCP, HCR_EL2); + HCR_TWE|HCR_TWI|HCR_TSC|HCR_TAC|HCR_SWIO|HCR_TIDCP, HCR_EL2); isb(); } @@ -1803,8 +1803,13 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs) advance_pc(regs, hsr); return; } - /* at the moment we only trap WFI */ - vcpu_block_unless_event_pending(current); + if ( hsr.wfi_wfe.ti ) { + /* Yield the VCPU for WFE */ + vcpu_force_reschedule(current); + } else { + /* Block the VCPU for WFI */ + vcpu_block_unless_event_pending(current); + } advance_pc(regs, hsr); break; case HSR_EC_CP15_32: diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index bdfff4e95d..9d230f32e8 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -276,6 +276,15 @@ union hsr { unsigned long ec:6; /* Exception Class */ } cond; + struct hsr_wfi_wfe { + unsigned long ti:1; /* Trapped instruction */ + unsigned long sbzp:19; + unsigned long cc:4; /* Condition Code */ + unsigned long ccvalid:1;/* CC Valid */ + unsigned long len:1; /* Instruction length */ + unsigned long ec:6; /* Exception Class */ + } wfi_wfe; + /* reg, reg0, reg1 are 4 bits on AArch32, the fifth bit is sbzp. */ struct hsr_cp32 { unsigned long read:1; /* Direction */